Layering, Understanding, Controlling and Integrating Ferroelectric Polar Textures on Silicon

Introduction

Ferroelectric materials have been known, and their fascinating properties exploited for more than 100 years. Still, in recent years, exotic polar textures resembling those found in magnetic materials have been unraveled in nanoscale ferroelectric perovskite oxides, such as flux closure domains, curling polarization, vortices, and the groundbreaking discoveries of polar skyrmions and merons in 2019/2020.

Potential Applications

Polar textures hold huge promise for novel robust topological electronic devices such as ultra-compact (> Tbit/in²) memories. However, so far, nanoscale polar domains have only been studied on special oxide substrates (e.g., SrTiO3), which precludes practical applications.

Proposed Approach

I propose to take a revolutionary approach to the field of topological polar textures by bringing them to the realm of the Si platform. Not only is this necessary to implement energy-efficient nanodevices, but Si material and advanced CMOS semiconductor technologies offer multiple unexplored ways to engineer mechanical and electrical boundary conditions in ultrathin films and nanostructures of transition metal oxides.

Objectives

With LUCIOLE, I will push the limits in the exploration and future harnessing of emergent states in ferroics with the following objectives:

1. Create monolithically-integrated topological polar textures on silicon by molecular beam epitaxy and atomic layer deposition of epitaxial and glass-composite nanoscale ferroelectrics using strain, confinement, and frustration engineering.
2. Understand the polar textures created on silicon by combining advanced state-of-the-art correlative microscopies and spectroscopies at the nanoscale, including operando time-resolved methods.
3. Integrate ferroelectrics at the nanoscale at the front-end and back-end of line of Si chips in sub-500 nm two- and three-terminal devices with tunable stress and study their manipulation under electric field by statistically screening their properties at the wafer scale to unveil potentially rich behavioral patterns.