Codasip High-end processor IP and high-level design tools for RISC-V

Introduction

Codasip offers a unique combination of semiconductor processor IP based on the RISC-V open instruction set architecture (ISA) and high-level EDA tool Codasip Studio, providing outstanding flexibility and 5x faster time to market.

Applications of RISC-V ISA

RISC-V ISA can be used for a wide variety of applications, including:

• Low power and low gate count embedded cores
• Advanced high frequency application cores

Portfolio Expansion

We are extending our portfolio of IP cores to include high-end high-performance compute areas. This will complement our existing cores that cover the power-efficient embedded and mid-range compute areas.

New Core Development

A new generation of advanced core is being developed, featuring:

• A 9-stage pipeline
• Out-of-order superscalar architecture called A90

The release of A90 will lead towards the A110 core, which will include:

• Heavily speculative execution
• An 11-stage pipeline

Tool Release

The design of these cores will simultaneously trigger a release of the Codasip Studio processor design tool for high-end compute, which will include advanced features such as support for out-of-order architectures.